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 Message 90 of 1,524 
 John Guillory to Greg Goodwin 
 Commodore PC 02/02 
 06 Apr 12 21:43:00 
 
(Continued from previous message)

achieve a multiply, or use shifts. Modern Intel processors are much like
a cross between the two.  They have CISC instruction sets, yet they have
multiple processors on one CPU to allow concurrent instructions like the
RISC processors.  While I'd like to play around with writing RISC based
assembly....  I wouldn't want to do it on a regular basis!  Much like
80486+ optimizations, you write your code and you constantly look at the
next and previous instruction to make sure that your not using the same
register in the next or previous instruction, nor accessing memory when
you need an instruction to run at the same time as another.... Any use
of the same instruction on the next instruction causes a stall, any use
of memory read or write causes a stall, etc...  If you want to bog down
a 80486, just do something like this:

                L0:  MOV EAX, EBX
                     MOV WORD PTR [DI], EAX
                     SUB EAX, EAX
                     JMP FAR L1
                L1:  JMP FAR L2
                L2:  MOV EBX, EAX
                     SUB EBX, EBX
                     RET

Pretty much every instruction generates a stall and causes the CPU to
wait for the previous instruction to finish before starting another....
Basically doing away with most of the benifiets of the 80486 and making
it more like a 80386.... ;-)
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