
ADD      offset to base chip address $dff000
&        register used by DMA channel only
%        register used by DMA	channel usually, processors sometimes
+        address register pair. low word uses DB1-DB15; high word uses DB0-DB2
*        address not writable by the copper
@        address not writable by the copper unless COPCON is set true
A        Agnus
D        Denise
P        Paula
R,W      Read, Write
ER	    Early read
S        Strobe
PTL,PTH  18-bit DMA address pointer
LCL,LCH  18-bit starting address DMA pointer
MOD      15-bit modulo

Registers in the Peripheral Interface Adapters (8520s) (PIA)

8520-A	8520-B	Name	Explanation
-----------------------------------------------------
BFE001	BFD000	PRA	Peripheral data register A
BFE101	BFE100	PRB	Peripheral data register B
BFE201	BFE200	DDRA	Data direction register A
BFE301	BFD300	DDRB	Data direction register B
BFE401	BFD400	TALO	TIMER A low register
BFE501	BFD500	TAHI	TIMER A high register
BFE601	BFD600	TBLO	TIMER B low register
BFE701	BFD700	TBHI	TIMER B high register
BFE801	BFD800		Event LSB
BFE901	BFD900		Event 8-15
BFEA01	BFDA00		Event MSB
BFEB01	BFDB00		No connect
BFEC01	BFEC00	SDR	Serial data register
BFED01	BFDD00	ICR	Interrupt control register
BFEE01	BFDE00	CRA	Control register A
BFEF01	BFDF00	CRB	Control register B
